Abstract / truncated to 115 words (read the full abstract)

Designing energy-efficient multiprocessing hardware for applications such as video decoding or MIMO-OFDM baseband processing is challenging because these applications require high throughput, as well as flexibility for efficient use of the processing resources. Application specific hardwired accelerator circuits are the most energy-efficient processing resources, but are inflexible by nature. Furthermore, designing an application specific circuit is expensive and time-consuming. A solution that maintains the energy-efficiency of accelerator circuits, but makes them flexible as well, is to make the accelerator circuits fine-grained. Fine-grained application specific processing elements can be designed to implement general purpose functions that can be used in several applications and their small size makes the design and verification times reasonable. This thesis proposes ... toggle 3 keywords

scheduling parallel processing digital signal processors

Information

Author
Boutellier, Jani
Institution
University of Oulu
Supervisor
Publication Year
2009
Upload Date
March 29, 2011

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